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Publication detail

 
Reference IEC 60822 ed1.0 withdrawn corrigendum
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Title VSB - Parallel Sub-system Bus of the IEC 60821 VMEbus
Publication date 1988-12-30
Format, price
(Swiss francs)
and language
330.- 311 pages
330.- 11403 Kb
 
Abstract The VSB bus was designed to meet the needs of multiprocessor systems based on high-performance 32-bit microprocessors built up from board assemblies. lt includes a high-speed asynchronous data transfer bus allowing masters to direct the transfer of binary data to and from slaves according to 4 kinds of cycles: address-only, single-transfer, block-transfer and interrupt-acknowledge cycles. It also includes an arbitration bus enabling arbiter modules and/or requester modules to coordinate the use of the data-transfer bus according to two arbitration methods (series or parallel). Note: -For the price of this publication, please consult the ISO/IEC price-code list.
Technical Committee JTC 1/SC 25 - Interconnection of information technology equipment  RSS
ICS Codes
31.080 Semiconductor devices
*Semiconducting materials, see 29.045

35.200 Interface and interconnection equipment
 
Replaced by
Stability date 2014
 
Work in progress
ProjectStage codeForecast publication date
No project under development--


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