International Electrotechnical Commission

Publication detail

Reference	ISO/IEC 14575 ed1.0 withdrawn corrigendum	> preview
Title	Information technology - Microprocessor systems - Heterogeneous InterConnect (HIC) (Low-Cost, Low-Latency Scalable Serial Interconnect for Parallel System Construction)
Publication date	2000-07-11
Format, price (Swiss francs) and language	224.- 148 pages 224.- 1523 Kb
Abstract	The construction of high-performance systems with parallel communications, parallel processing, and/or parallel I/O demands a fast, low-cost, low-latency interconnect. It must be fast and low-latency, otherwise it will be the limiting factor in system performance; and it must be low-cost, or it will dominate the system cost. This standard has been developed to complement recent technical developments of highly integrated, low-power interconnect technology implemented in high-volume commodity VLSI processes, and to exploit the simplifications in encodings and protocols resulting from the use of relatively reliable media over relatively short distances.
Technical Committee	JTC 1/SC 25 - Interconnection of information technology equipment
ICS Codes	35.160 Microprocessor systems *Including PCs, calculators, etc. *Integrated circuits, see 31.200
Replaced by
Stability date	2011
Work in progress	Project Stage code Forecast publication date No project under development - -

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