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Reference IEC 61691-6 ed1.0 withdrawn corrigendum
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Title Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions
Publication date 2009-12-14
Format, price
(Swiss francs)
and language
340.- 332 pages
340.- 5004 Kb
 
Abstract IEC 61691-6:2009(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.
Technical Committee 91 - Electronics assembly technology  RSS
ICS Codes
25.040 Industrial automation systems
*IT applications in industry, see 35.240.50

35.060 Languages used in information technology
 
Replaced by
Stability date 2015
 
Work in progress
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