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Reference IEC 60191-6-6 ed1.0 withdrawn corrigendum
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Title Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine pitch land grid array (FLGA)
Publication date 2001-03-22
Format, price
(Swiss francs)
and language
50.- 25 pages
50.- 988 Kb
 
Abstract IEC 60191-6-6:2001 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (hereinafter called FLGA) whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.
Technical Committee 47D - Semiconductor devices packaging  RSS
ICS Codes
31.080.01 Semiconductor devices in general
 
Replaced by
Stability date 2016
 
Work in progress
ProjectStage codeForecast publication date
No project under development--


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