IEC 62050:2005 Withdrawn
VHDL Register Transfer Level (RTL) synthesis
Abstract
Specifies a standard for use of very high-speed integrated circuit hardware description language (VHDL) to model synthesizable register-transfer level digital logic. A standard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset of the VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructs are identified that should be ignored or flagged as errors.
Additional information
Publication type | International Standard |
---|---|
Publication date | 2005-07-19 |
Withdrawal date | 2010-08-04 |
Edition | 1.0 |
Available language(s) | English |
TC/SC | TC 91 - Electronics assembly technologyrss |
ICS | 25.040.01 - Industrial automation systems in general 35.240.50 - IT applications in industry |
Stability date | 2010 |
Pages | 121 |
File size | 782 KB |
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