IEC 61691-6:2009 

Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions


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IEC 61691-6:2009(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.

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Additional information

Publication typeInternational Standard
Publication date2009-12-14
Available language(s)English
TC/SCTC 91 - Electronics assembly technologyrss
ICS25.040.01 - Industrial automation systems in general
35.060 - Languages used in information technology
Stability date  2023
File size5004 KB

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