IEC TR 61189-5-506:2019
Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-506: General test methods for materials and assemblies - An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501
Abstract
IEC TR 61189-5-506:2019(E) is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. This document sets out to validate the introduction of a new 200-µm gap SIR pattern, and was benched marked against existing SIR gap patterns of 318 µm and 500 µm.
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Additional information
| Publication type | Technical Report |
|---|---|
| Publication date | 2019-06-26 |
| Edition | 1.0 |
| Available language(s) | English |
| TC/SC | TC 91 - Electronics assembly technologyrss |
| ICS | 31.180 - Printed circuits and boards |
| Stability date | 2029 |
| Pages | 23 |
| File size | 5587 KB |
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