IEC 60191-6-10:2003 

Mechanical standardization of semiconductor devices - Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Dimensions of P-VSON


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IEC 60191-6-10:2003 provides the common outline drawings and dimensions for all types of structures and composed materials of plastic very thin small outline non-lead package (hereinafter called P-VSON).

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Additional information

Publication typeInternational Standard
Publication date2003-11-19
Available language(s)English, English/French, Spanish
TC/SCTC 47/SC 47D - Semiconductor devices packagingrss
ICS31.080.01 - Semiconductor devices in general
Stability date  2024
File size1186 KB

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